USB development board USB2.0 development board EZ USB development board USB FPGA package
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USB development board USB2.0 development board EZ USB development board USB FPGA package - 1

Product Details

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Product introduction:

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Brief introduction of development board
The USB2.0+FPGA development board, mainly by the low power USB2.0 control chip CY7C68013A128AXC, FPGA chip EP1C6Q240C8 and SRAM chip IS61LV25616AL-10T combined, high speed transmission USB2.0. The actual transmission speed of the USB2.0+FPGA development board is up to 38MBytes/s. The high speed data acquisition system can be easily built by using the USB2.0+FPGA development board.
Whether you are a novice on USB development or a base developer, you can benefit from this development board suite. The complete and detailed Chinese development document contains the essence of the USB development that our development team has been engaged in for many years. If you are a beginner, we also recorded a development video in addition to a detailed development document, and we took you into the hall of USB development. If you are a developer with a certain base, our in-depth research on GPIF and SLVE FIFO can provide valuable experience for your actual development, save your valuable development time and improve the actual USB data transmission speed.

Functional characteristics of development board
-Conform to the USB2.0 specification480Mbps high speed transmission protocol standard, compatible with USB1.1;
-
Complete firmware downloadThe firmware program is downloaded to the 68013 chip through the VC application software.
-Complete online programmingThe 8K bytes program space (EEPROM) is provided, and the program code can be repeatedly burned and written on the development system without a programmer;
-Complete online simulation debugging schemeThrough the full window development environment Keil C, the emulator can be debugged without the need of the emulator.
-Complete and detailed Chinese development documentsIt can be used as a reference manual for the development of data.
-Vivid development tutorials videoTo help you quickly master the USB Development Essentials;
-GPIF development courseThe development process of GPIF is introduced in detail through an example, including waveform editing, firmware programming, instance test and so on.
-SLAVE FIFO development courseThe development process of SLAVE FIFO is introduced in detail through an example, including firmware programming, instance test and so on.
-Practical firmware downloading exampleIt greatly improves the flexibility of the product.
-Rich experimental examplesControl transfer, interrupt transmission, synchronous transmission, bulk transfer, read and write speed test, GPIF test, single byte read and write, read and write GPIF data flow test, SLAVE FIFO 8 bit data read and write test, SLAVE FIFO 16 bit data read and write test, USB serial test, firmware download, IO port control. I2C control;
-speedtestThe actual transmission speed is up to 38Mbytes/s.
-Complete development source codeIt includes: firmware (Keil C51), application development (VC6.0) development environment (Engineering), FPGA source code, driver (DDK and DriverStudio) and so on, shortening user development time.
-Chip selectionUsing 128 - foot FX2 chip CY7C68013A-128AXC, EP1C6Q240C8 provides rich FPGA resources and large capacity 256K * 16bits SRAM to meet the real-time acquisition of high speed data.
-Rich extension interfaceAll GPIF and SLAVE related pins are connected to FPGA and have 40PIN external sockets. The total number of independent IO is 36.
It can be conveniently connected with the peripherals for two development.

project

Explain

Hardware configuration

USB chip: CY7C68013A-128AXC

FGPA chip: EP1C6Q240C8

SRAM chip: IS61LV25616AL-10T

FPGA configuration chip: EPCS4

Serial transceiver chip: MAX3232ESE

EEPROM chip: AT24C64AN

3.3VLDO:LM1117-3.3

1.5VLDO:LM1117-1.5

User extension interface

There is a 40 - pin IDC interface for the user to develop two times.
The total number of IO users can reach 36, for 3.3V power supply.

Developing documents

With the development of documentation: USB2.0FPGA development document

VC source code

CYDEMO application source code

CYPRESS control panel source code

Firmware source codeBecause of the number of code, almost every development instance has the corresponding source code.
Therefore, this will not be listed one by one, specifically the development examples.
FPGA source code
(VHDL)

An example of writing speed test

An example of reading speed test

SLAVE FIFO 8 bit reading and writing test example

SLAVE FIFO 16 bit reading and writing test example

GPIF single byte read and write test example

GPIF large data stream reading and writing test example

IO test example

Driver source code

Firmware downloading drive, the VC development environment has been built

FX2 universal driver, which has built a VC development environment

Development example

Firmware program selection example

Firmware program download instance

Control the transmission instance

Interrupt transmission instance

Batch transmission instance

Synchronous transmission instance

An example of writing speed test

An example of reading speed test

Multi thread test example

IO test example

I2C test example

8 bit SLAVE FIFO writing instance

8 bit SLAVE FIFO read instance

16 bit SLAVE FIFO writing instance

16 bit SLAVE FIFO read instance

GPIF single byte write instance

GPIF single byte read instance

GPIF large data stream write instance

GPIF large data read instance

An example of USB to serial port

Connection device instance

Get an instance of an endpoint list

68013 internal single chip reset example

68013 internal locking example of single chip microcomputer

Get an instance of the device descriptor

Get an instance of the interface descriptor

Get the configuration descriptor instance

Get an instance of the endpoint descriptor

Get an instance of the character descriptor

Getting an instance of a transmission frame

Other development tutorials

FX2 online simulation tutorial
FX2 online programming tutorials

Product release

CYDEMO application: CYDEMO.exe

Install the file: cydemo.inf

Universal driver: hnrezusb.sys

Firmware download driver: hnrezloader.sys

CD-ROM content

User registration form

USB2.0FPGA development document

Development video: software installation video

SLAVE FIFO development video

GPIF development video

CYPRESS development package: EZ-USB_devtools_version_261700

Development tools: VC programming plug-in Visual Assist X v10.3.1541.0

C51 compiler tool keilc51v750a_full++uv3

Drive development toolsDriverStudio V3.2

DDK installation packages WIN98 DDK, WIN2000 DDK, WINXP DDK

USB debugger bushound5.0 perfect edition

Text editor UltraEdit_13.00

A large number of USB development related books

USB protocol: USB1.1 protocol (Chinese and English), USB2.0 protocol (English),

USB OTG protocol (English)

Chip data: all device data used on board

Product release example

VC application source code

Firmware source code

FPGA source code

Driver source code

The circuit principle diagram


List of products:

1, USB2.0+FPGA development board one;

2, USB double layer shielding line two;

3, USB BLASTER download line one;

4, a serial port line;

5, two CDs;

Sales promotion, in order to reply to the old and new customers, our company has launched this set of super value development kit.

The right of final interpretation of Beijing Huanuoming electronics has this event.

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